EDN

8M Low-Power CMOS SRAM

Alliance Memory announced the expansion of its line of legacy low-power CMOS SRAMs with a new 8M IC (512K x 16 bit) in the 48-pin 12-mm by 20-mm TSOP-I package. Available from a very limited number of ...
Electronic Design

Crolles2 Alliance reveals ultra-dense SRAM cell in 45 nm conventional bulk CMOS

The Crolles2 Alliance, which includes Freescale Semiconductor, Philips and STMicroelectronics, has created six-transistor SRAM-bit cells with an area of less than 0.25 square microns, or about half ...
EDN

Describing the foundations for 22-nm CMOS logic and SRAM

A collection of papers at this month's International Electron Devices Meeting (IEDM) illustrates the frantic work underlying the industry's gradual move toward a manufacturable 22-nm SOC. Work in ...
Electronic Design

High-Density, Low-Power 32M CMOS SRAM

Alliance Memory today expands its line of legacy low-power CMOS SRAMs with a new 32M IC (2M x 16 / 4M x 8 switchable), the company's highest density low-power device to date. A line of legacy ...
Semiconductor Engineering

Zeno Semi Expands On-Chip Memory

San Jose, Calif.-based startup Zeno Semiconductor is testing modifications and a smaller process node for the single-transistor 28nm SRAM chip it introduced in 2016, which could boost space for ...
Design-Reuse

Low Power 7T SRAM Cell Scheme - ''Saving Write Zero Power''

This paper presents a Seven-transistor SRAM cell intended for the advanced microprocessor. A low power write scheme, which reduces SRAM power by using seven-transistor sense-amplifying memory cell, ...