EDN

Synopsys’ DesignWare IP for PCI Express with Support for Low-Power Sub-States Successfully Taped Out in Multiple Designs

Synopsys is the first IP provider to offer new “off” and “snooze” power states (L1 sub-states) in PCI Express® controller IP Ten customer designs have integrated Synopsys' new PCI Express IP with L1 ...
EDN

Magillem Verification Scenarii environment configures validation of IP, sub-systems, and testbench generation

Magillem Verification Scenarii, is the latest software proudly launched by Magillem, the leader of IP XACT based solutions for improved flow methodology : Complex SoCs require three layers of ...
Design-Reuse

Xilinx Vivado Design Suite 2015.3 Takes Design to New Heights with IP Sub-Systems

Xilinx, Inc. (NASDAQ: XLNX) today announced the 2015.3 release of the Vivado® Design Suite. The new release enables platform and system developers to increase productivity and decrease development ...
Design-Reuse

Qualitas Semiconductor Signs First ASIL-B-Compliant MIPI Sub-system IP Agreement for Autonomous ADAS SoC

SEOUL, South Korea – QUALITAS SEMICONDUCTOR CO., LTD. (hereinafter referred to as "Qualitas") (KOSDAQ: 432720), a leading provider of high-speed interconnect IP solutions, announced today that it has ...