EDN

Microsemi’s Libero SoC v11.7 Software Increases Security, Usability and Efficiency for FPGA Designs, Enabling Faster Time-to-Market

“The release of our Libero SoC v11.7 software offers a significantly improved user experience due to a new and enhanced constraints flow with a new constraints management view, a fully redesigned ...
EDN

Libero IDE Tools Enable Faster Timing Closure and Performance

Actel Corporation announced it has enhanced its Libero(TM) integrated design environment (IDE) to provide customers with faster timing closure when using the company's successful flash-based ProASIC ...
Electronic Design

Libero SoC v11.4 Software Improves FPGA Runtime Up To 35%

According to Microsemi, its updated Libero System-On-Chip (SoC) version 11.4 software reduces design flow runtime by up to 35% and timing analysis runtime by 20% for the company’s SmartFusion and ...