EDN

New Cadence Modus Test Solution Delivers Up to 3X Reduction in SoC Test Time

“Our next-generation Modus Test Solution delivers new, innovative patent-pending technology that fundamentally changes the way design and test engineers address the test problem,” said Dr. Anirudh ...
Design-Reuse

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using Arm MBIST Interface

SAN JOSE, Calif., Nov. 14, 2016 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence ® Modus ™ Test Solution now supports the Arm ® Memory Built-In Self Test (MBIST) ...
CNN

AltaSens Adopts Cadence Modus Test Solution for Mixed-Signal Image Sensor Designs

Cadence Modus Test Solution's seamless integration with digital and verification tools enabled AltaSens to meet test coverage goals and save weeks on design convergence SAN JOSE, Calif., Jan. 11, 2017 ...
EDN

Cadence Modus Test Solution Enables Support for Safety-Critical SoC Designs Using ARM MBIST Interface

Through Cadence's support of the ARM MBIST interface, customers can deliver innovative SoC designs to market faster and with better power, performance and area (PPA). For example, the Modus Test ...